1. Field of the Invention
Example embodiments of the present invention relate to a semiconductor memory device and a memory system, and more particularly to a semiconductor memory device having a redundancy code checking function and a memory system having the same.
2. Description of the Related Art
As application systems become more developed, a transfer rate and a throughput of data between a host, for example, a memory controller, and a semiconductor memory device is increasing. At least in part due to the increase of the transfer rate and the throughput of data, signal integrity for transferred data is becoming more important. In a high-speed communication, the number of dual in-line memory modules (DIMM) per channel may be restricted. Conventionally, to deal with the restriction, a fully buffered dual in-line memory module (FBDIMM) has been used. In the FBDIMM, a buffer referred to as a hub, may be placed between the semiconductor memory device and a host.
FIG. 1 is a block diagram illustrating a prior art computer system including memory hubs included in memory modules.
Referring to FIG. 1, a computer system 100 may include a processor 104, a system controller 110, a cache memory 108, a graphic controller 112, a video terminal 114, an input device 118, an output device 120, a data storage device 124, and memory modules 130a, 130b, . . . , 130n. 
The system controller 110 may function as a path through which the above devices 112, 114, 118, 120 and 124 communicate with the processor 104. The system controller 110 may include a memory hub controller (not shown) coupled with the memory modules 130a, 130b, . . . , 130n. The memory modules 130a, 130b, . . . , 130n may function as a system memory for the computer system 100. The memory modules 130a, 130b, . . . , 130n may be coupled with the memory hub controller through a common link 134. Each of the memory modules 130a, 130b, . . . , 130n may include a memory hub 140 for controlling access to, for example, six corresponding memory devices 148. Each memory device 148 may be a synchronous dynamic random access memory (SDRAM). Memory hub 140 may be coupled with memory devices 148 through a bus system including a control bus, an address bus and a data bus, for example.
Even in a FBDIMM memory system, however, transfer errors may occur between semiconductor memory devices during data transfer processes.